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| author | Takeshi Kihara <takeshi.kihara.df@renesas.com> | 2018-01-19 18:24:25 +0900 |
|---|---|---|
| committer | Ryo Kataoka <ryo.kataoka.wt@renesas.com> | 2018-12-07 19:57:02 +0900 |
| commit | df0d0ecb5f8a21abde810310e5de3e4f7d5e7a11 (patch) | |
| tree | d201327c20dda21159ef1a3e5bce92d648670ba8 | |
| parent | 41e220141e7d75bedc5d8a224883d237efa34005 (diff) | |
| download | renesas-bsp-df0d0ecb5f8a21abde810310e5de3e4f7d5e7a11.tar.gz | |
arm64: dts: r8a7796-m3ulcb: Disable CPUIdle support for CA53
The revision of M3ULCB board on the R8A7796 SoC is ES1.0. This revision
can not use CPUIdle for CA53 cores.
Therefore, this patch disables CPUIdle support for CA53.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 24 |
1 files changed, 23 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts index d61d1b14a3839b..3e6a4e111b38d4 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts +++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts @@ -2,7 +2,7 @@ /* * Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) board * - * Copyright (C) 2016-2017 Renesas Electronics Corp. + * Copyright (C) 2016-2018 Renesas Electronics Corp. * Copyright (C) 2016 Cogent Embedded, Inc. */ @@ -14,6 +14,12 @@ model = "Renesas M3ULCB board based on r8a7796"; compatible = "renesas,m3ulcb", "renesas,r8a7796"; + cpus { + idle-states { + /delete-node/ cpu-sleep-1; + }; + }; + memory@48000000 { device_type = "memory"; /* first 128MB is reserved for secure area. */ @@ -66,6 +72,22 @@ }; }; +&a53_0 { + /delete-property/ cpu-idle-states; +}; + +&a53_1 { + /delete-property/ cpu-idle-states; +}; + +&a53_2 { + /delete-property/ cpu-idle-states; +}; + +&a53_3 { + /delete-property/ cpu-idle-states; +}; + &du { clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, |