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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2024-03-17 22:52:14 +0100
committerUwe Kleine-König <u.kleine-koenig@pengutronix.de>2024-04-22 12:42:26 +0200
commit01558a65c365b426b34455758dfdbb9264519e16 (patch)
treed84cff5c225aaea262d81e977036edcbb71c9d96
parent871a7de7fc08f2c9395059928736cacac2ac5271 (diff)
downloadrenesas-drivers-01558a65c365b426b34455758dfdbb9264519e16.tar.gz
pwm: stm32: Improve precision of calculation in .apply()
Notice: this object is not reachable from any branch.
While mathematically it's ok to calculate the number of cyles for the duty cycle as: duty_cycles = period_cycles * duty_ns / period_ns this doesn't always give the right result when doing integer math. This is best demonstrated using an example: With the input clock running at 208877930 Hz a request for duty_cycle = 383 ns and period = 49996 ns results in period_cycles = clkrate * period_ns / NSEC_PER_SEC = 10443.06098828 Now calculating duty_cycles with the above formula gives: duty_cycles = 10443.06098828 * 383 / 49996 = 80.00024719 However with period_cycle truncated to an integer results in: duty_cycles = 10443 * 383 / 49996 = 79.99977998239859 So while a value of (a little more than) 80 would be the right result, only 79 is used here. The problem here is that 14443 is a rounded result that should better not be used to do further math. So to fix that use the exact formular similar to how period_cycles is calculated. Link: https://lore.kernel.org/r/7628ecd8a7538aa5a7397f0fc4199a077168e8a6.1710711976.git.u.kleine-koenig@pengutronix.de Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Notice: this object is not reachable from any branch.
-rw-r--r--drivers/pwm/pwm-stm32.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/pwm/pwm-stm32.c b/drivers/pwm/pwm-stm32.c
index ffe572b76174a7..fb714936ff8f1e 100644
--- a/drivers/pwm/pwm-stm32.c
+++ b/drivers/pwm/pwm-stm32.c
@@ -351,8 +351,9 @@ static int stm32_pwm_config(struct stm32_pwm *priv, unsigned int ch,
regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE);
/* Calculate the duty cycles */
- dty = prd * duty_ns;
- do_div(dty, period_ns);
+ dty = (unsigned long long)clk_get_rate(priv->clk) * duty_ns;
+ do_div(dty, prescaler + 1);
+ do_div(dty, NSEC_PER_SEC);
regmap_write(priv->regmap, TIM_CCR1 + 4 * ch, dty);