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authorArnd Bergmann <arnd@arndb.de>2024-04-26 18:05:31 +0200
committerArnd Bergmann <arnd@arndb.de>2024-04-26 18:05:31 +0200
commit83b7bf1bdd479d375143d293d9ecad0043acced5 (patch)
tree988112a423ff8178e32c17a852c84e2e884b1c5b
parent3a940d0119340774e0fe620a163256ba7681caa5 (diff)
parent6ee8c2d34ea866fa16a1733579720751ab4a1c66 (diff)
downloaddevicetree-rebasing-83b7bf1bdd479d375143d293d9ecad0043acced5.tar.gz
Merge tag 'imx-fixes-6.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into for-next
i.MX fixes for 6.9, round 2: - Fix i.MX8MP the second CSI2 assigned-clock property which got wrong by commit f78835d1e616 ("arm64: dts: imx8mp: reparent MEDIA_MIPI_PHY1_REF to CLK_24M") - Correct USB over-current polarity for imx6ull-tarragon board * tag 'imx-fixes-6.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts: imx6ull-tarragon: fix USB over-current polarity arm64: dts: imx8mp: Fix assigned-clocks for second CSI2 Link: https://lore.kernel.org/r/ZioopqscxwUOwQkf@dragon Signed-off-by: Arnd Bergmann <arnd@arndb.de> [ upstream commit: 7e685383468ec677f53fccc743875fc0555f0fd3 ]
-rw-r--r--src/arm/nxp/imx/imx6ull-tarragon-common.dtsi1
-rw-r--r--src/arm64/freescale/imx8mp.dtsi2
2 files changed, 2 insertions, 1 deletions
diff --git a/src/arm/nxp/imx/imx6ull-tarragon-common.dtsi b/src/arm/nxp/imx/imx6ull-tarragon-common.dtsi
index 3fdece5bd31f9..5248a058230c8 100644
--- a/src/arm/nxp/imx/imx6ull-tarragon-common.dtsi
+++ b/src/arm/nxp/imx/imx6ull-tarragon-common.dtsi
@@ -805,6 +805,7 @@
&pinctrl_usb_pwr>;
dr_mode = "host";
power-active-high;
+ over-current-active-low;
disable-over-current;
status = "okay";
};
diff --git a/src/arm64/freescale/imx8mp.dtsi b/src/arm64/freescale/imx8mp.dtsi
index bfc5c81a5bd4e..8141926e4ef14 100644
--- a/src/arm64/freescale/imx8mp.dtsi
+++ b/src/arm64/freescale/imx8mp.dtsi
@@ -1672,7 +1672,7 @@
<&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT>,
<&clk IMX8MP_CLK_MEDIA_AXI_ROOT>;
clock-names = "pclk", "wrap", "phy", "axi";
- assigned-clocks = <&clk IMX8MP_CLK_MEDIA_CAM1_PIX>,
+ assigned-clocks = <&clk IMX8MP_CLK_MEDIA_CAM2_PIX>,
<&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
<&clk IMX8MP_CLK_24M>;