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| author | Aya Levin <ayal@nvidia.com> | 2021-04-04 12:55:00 +0300 |
|---|---|---|
| committer | Saeed Mahameed <saeedm@nvidia.com> | 2021-04-06 21:04:36 -0700 |
| commit | 534b1204ca4694db1093b15cf3e79a99fcb6a6da (patch) | |
| tree | bca5f353d32bafc4b0eda16d5445b650199ccd28 | |
| parent | ce28f0fd670ddffcd564ce7119bdefbaf08f02d3 (diff) | |
| download | misc-534b1204ca4694db1093b15cf3e79a99fcb6a6da.tar.gz | |
net/mlx5: Fix PBMC register mapping
Add reserved mapping to cover all the register in order to avoid setting
arbitrary values to newer FW which implements the reserved fields.
Fixes: 50b4a3c23646 ("net/mlx5: PPTB and PBMC register firmware command support")
Signed-off-by: Aya Levin <ayal@nvidia.com>
Reviewed-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
| -rw-r--r-- | include/linux/mlx5/mlx5_ifc.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index 9940070cda8ffe..9c68b2da14c637 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -10200,7 +10200,7 @@ struct mlx5_ifc_pbmc_reg_bits { struct mlx5_ifc_bufferx_reg_bits buffer[10]; - u8 reserved_at_2e0[0x40]; + u8 reserved_at_2e0[0x80]; }; struct mlx5_ifc_qtct_reg_bits { |