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| author | Murali Karicheri <m-karicheri2@ti.com> | 2012-03-02 14:58:07 -0500 |
|---|---|---|
| committer | Cyril Chemparathy <cyril@ti.com> | 2012-09-21 10:44:05 -0400 |
| commit | 2a32313d553a7ab713779771a441cebfd75acca9 (patch) | |
| tree | 0b59d3f718440ed7c3c422e2813bdc53077478a5 | |
| parent | f533949d108db8bd43e62e2dc06713964b5aacd6 (diff) | |
| download | linux-keystone-2a32313d553a7ab713779771a441cebfd75acca9.tar.gz | |
tci6614: fix reboot command
For the reboot command to work, the watchdog output has to trigger a
device reset. In TCI6614 SoC, this requires setting the RSTMUX8 register to
generate a device reset using the WD output.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
| -rw-r--r-- | arch/arm/mach-davinci/tci6614.c | 24 |
1 files changed, 23 insertions, 1 deletions
diff --git a/arch/arm/mach-davinci/tci6614.c b/arch/arm/mach-davinci/tci6614.c index 20cc794d214d03..9bb670e78e5fb5 100644 --- a/arch/arm/mach-davinci/tci6614.c +++ b/arch/arm/mach-davinci/tci6614.c @@ -50,13 +50,17 @@ #define TCI6614_BOOT_CFG_DEVSTAT (TCI6614_BOOT_CFG_BASE + 0x20) #define TCI6614_MAINPLL_CTL0 (TCI6614_BOOT_CFG_BASE + 0x328) -#define TCI6614_MAINPLL_CTL0 (TCI6614_BOOT_CFG_BASE + 0x328) #define TCI6614_PLLCTRL_PLLM (TCI6614_PLL_BASE + 0x0110) +#define TCI6614_RSTMUX8 (TCI6614_BOOT_CFG_BASE + 0x0318) #define TCI6614_DEFAULT_IN_CLK 50000000 #define MAINPLL_CTL0_PLLM_MASK 0x7F000 #define MAINPLL_CTL0_PLLM_SHIFT 6 #define MAINPLL_CTL0_PLLD_MASK 0x3f #define PLLCTRL_PLLM_MASK 0x3f +#define RSTMUX8_OMODE_DEVICE_RESET 5 +#define RSTMUX8_OMODE_DEVICE_RESET_SHIFT 1 +#define RSTMUX8_OMODE_DEVICE_RESET_MASK (BIT(1) | BIT(2) | BIT(3)) +#define RSTMUX8_LOCK_MASK BIT(0) /* PSC control registers */ static u32 psc_regs[] = { TCI6614_PSC_BASE }; @@ -455,7 +459,25 @@ static struct davinci_soc_info tci6614_soc_info = { void __init tci6614_init(void) { + void __iomem *rstmux8; + u32 val; + davinci_common_init(&tci6614_soc_info); + /* Configure the RSTMUX8 register so that a WD output will trigger a + device reset + */ + rstmux8 = ioremap(TCI6614_RSTMUX8, 4); + WARN_ON(!rstmux8); + if (rstmux8) { + val = __raw_readl(rstmux8) & ~RSTMUX8_OMODE_DEVICE_RESET_MASK; + if (!(val & RSTMUX8_LOCK_MASK)) { + val |= (RSTMUX8_OMODE_DEVICE_RESET << + RSTMUX8_OMODE_DEVICE_RESET_SHIFT); + __raw_writel(val, rstmux8); + } else + printk(KERN_NOTICE "Warning, can't write to RSTMUX8\n"); + } + iounmap(rstmux8); } static void __iomem *cpintc_base; |