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authorAlexandre Belloni <alexandre.belloni@bootlin.com>2020-01-10 18:20:07 +0100
committerBen Hutchings <ben@decadent.org.uk>2020-05-22 21:19:24 +0100
commit067a41769a5a626e571311d3a418a19223c3aefa (patch)
treee5473fd6887bc60d49a9e7eb3e8fbf9a3e08b893
parent459e1604fb035947a9e7f0d969c9d72cf156739c (diff)
downloadlinux-stable-067a41769a5a626e571311d3a418a19223c3aefa.tar.gz
ARM: dts: at91: sama5d3: define clock rate range for tcb1
commit a7e0f3fc01df4b1b7077df777c37feae8c9e8b6d upstream. The clock rate range for the TCB1 clock is missing. define it in the device tree. Reported-by: Karl Rudbæk Olsen <karl@micro-technic.com> Fixes: d2e8190b7916 ("ARM: at91/dt: define sama5d3 clocks") Link: https://lore.kernel.org/r/20200110172007.1253659-2-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
-rw-r--r--arch/arm/boot/dts/sama5d3_tcb1.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sama5d3_tcb1.dtsi b/arch/arm/boot/dts/sama5d3_tcb1.dtsi
index 02848453ca0cf..80b623c8898de 100644
--- a/arch/arm/boot/dts/sama5d3_tcb1.dtsi
+++ b/arch/arm/boot/dts/sama5d3_tcb1.dtsi
@@ -23,6 +23,7 @@
tcb1_clk: tcb1_clk {
#clock-cells = <0>;
reg = <27>;
+ atmel,clk-output-range = <0 166000000>;
};
};
};