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| author | Shuai Xue <xueshuai@linux.alibaba.com> | 2022-11-04 22:51:20 +0800 |
|---|---|---|
| committer | Tony Luck <tony.luck@intel.com> | 2022-11-04 13:02:04 -0700 |
| commit | 09a53f13248fe311311349d710ebfd6e492b4ca1 (patch) | |
| tree | ad5dad9f0ff97a2be94ffb6b9fc59129f8aec6cb | |
| parent | 80b0edd6e94f532a5b8ffcfc4257a6f0a0f4aca0 (diff) | |
| download | ras-tools-09a53f13248fe311311349d710ebfd6e492b4ca1.tar.gz | |
einj_mem_uc: add a case to trigger prefetch
Signed-off-by: Shuai Xue <xueshuai@linux.alibaba.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
| -rw-r--r-- | .gitignore | 2 | ||||
| -rw-r--r-- | einj_mem_uc.c | 15 |
2 files changed, 17 insertions, 0 deletions
@@ -8,4 +8,6 @@ vtop .vscode modules.order *.cmd +*.mod +*.mod.c diff --git a/einj_mem_uc.c b/einj_mem_uc.c index e394cb5..0b916bb 100644 --- a/einj_mem_uc.c +++ b/einj_mem_uc.c @@ -767,11 +767,22 @@ int trigger_llc(char *addr) PRINT_TRIGGERING; asm volatile("clflush %0" : "+m" (*addr)); } + +int trigger_prefetch(char *addr) +{ +} #elif __aarch64__ int trigger_llc(char *addr) { asm volatile("dc civac, %0" : : "r" (addr) : "memory"); } + +int trigger_prefetch(char *addr) +{ + PRINT_TRIGGERING; + asm volatile("prfm pldl1keep, %a0\n" : : "p" (addr)); + sleep(5); +} #endif int trigger_instr(char *addr) @@ -907,6 +918,10 @@ struct test { }, #endif { + "prefetch", "Prefetch data into L1 cache. Should generate CMCI", + data_alloc, inject_uc, 1, trigger_prefetch, F_CMCI, + }, + { "memcpy", "Streaming read from target address. Probably fatal", data_alloc, inject_uc, 1, trigger_memcpy, F_MCE|F_CMCI|F_SIGBUS|F_FATAL, }, |