# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/spi/nuvoton,npcm750-fiu.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Nuvoton NPCM Flash Interface Unit (FIU) SPI Controller maintainers: - Tomer Maimon allOf: - $ref: /schemas/spi/spi-controller.yaml# description: | NPCM FIU supports single, dual and quad communication interface. The NPCM7XX supports three FIU modules: FIU0 and FIUx support two chip selects FIU3 supports four chip selects. The NPCM8XX supports four FIU modules: FIU0 and FIUx support two chip selects FIU1 and FIU3 support four chip selects. The FIU control register block is always required. The direct-mapped flash window is optional because the controller can still access flash through the UMA path when that mapping is not described. Alias convention: The '/aliases' node should define: For NPCM7xx: fiu0=&fiu0; fiu1=&fiu3; fiu2=&fiux; For NPCM8xx: fiu0=&fiu0; fiu1=&fiu3; fiu2=&fiux; fiu3=&fiu1; properties: compatible: enum: - nuvoton,npcm750-fiu # Poleg NPCM7XX - nuvoton,npcm845-fiu # Arbel NPCM8XX reg: description: The first resource is the FIU control register block. An optional second resource describes the direct-mapped flash window used for direct read/write accesses. minItems: 1 items: - description: FIU control registers - description: Memory-mapped flash contents reg-names: description: Resource names for the control registers and optional direct-mapped flash window. minItems: 1 items: - const: control - const: memory clocks: maxItems: 1 description: FIU reference clock. nuvoton,spix-mode: type: boolean description: Enable SPIX mode for an expansion bus to an ASIC or CPLD. required: - compatible - reg - reg-names - clocks unevaluatedProperties: false examples: - | #include spi@fb000000 { compatible = "nuvoton,npcm750-fiu"; reg = <0xfb000000 0x1000>, <0x80000000 0x10000000>; reg-names = "control", "memory"; #address-cells = <1>; #size-cells = <0>; clocks = <&clk NPCM7XX_CLK_SPI0>; flash@0 { compatible = "jedec,spi-nor"; reg = <0>; #address-cells = <1>; #size-cells = <1>; }; };