# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/remoteproc/qcom,kaanapali-soccp-pas.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Kaanapali SoCCP Peripheral Authentication Service maintainers: - Jingyi Wang description: The SoC Control Processor (SoCCP) is a small RISC-V MCU that controls USB Type-C, battery charging and various other functions on Qualcomm SoCs, somewhat analogous to traditional PC Embedded Controllers. This document describes the Peripheral Authentication Service that loads and boots firmware for SoCCP. properties: compatible: oneOf: - items: - enum: - qcom,hawi-soccp-pas - qcom,maili-soccp-pas - const: qcom,kaanapali-soccp-pas - enum: - qcom,glymur-soccp-pas - qcom,kaanapali-soccp-pas reg: maxItems: 1 clocks: items: - description: XO clock clock-names: items: - const: xo power-domains: items: - description: CX power domain - description: MX power domain power-domain-names: items: - const: cx - const: mx firmware-name: items: - description: Firmware name of the SoC Control Processor - description: Firmware name of the SoCCP Devicetree memory-region: items: - description: Memory region for main Firmware authentication - description: Memory region for Devicetree Firmware authentication interrupts: items: - description: Watchdog interrupt - description: Fatal interrupt - description: Ready interrupt - description: Handover interrupt - description: Stop acknowledge interrupt - description: Pong interrupt interrupt-names: items: - const: wdog - const: fatal - const: ready - const: handover - const: stop-ack - const: pong qcom,smem-states: minItems: 2 description: States used by the AP to signal the SoC Control Processor qcom,smem-state-names: minItems: 2 description: The names of the state bits used for SMP2P output required: - compatible - reg - memory-region - power-domains - power-domain-names allOf: - $ref: /schemas/remoteproc/qcom,pas-common.yaml# unevaluatedProperties: false examples: - | #include #include #include #include #include #define IPCC_MPROC_SOCCP remoteproc@d00000 { compatible = "qcom,kaanapali-soccp-pas"; reg = <0x00d00000 0x200000>; clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; interrupts-extended = <&intc GIC_SPI 167 IRQ_TYPE_EDGE_RISING>, <&soccp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, <&soccp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, <&soccp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, <&soccp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, <&soccp_smp2p_in 9 IRQ_TYPE_EDGE_RISING>; interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack", "pong"; memory-region = <&soccp_mem>, <&soccp_dtb_mem_mem>; firmware-name = "qcom/kaanapali/soccp.mbn", "qcom/kaanapali/soccp_dtb.mbn"; power-domains = <&rpmhpd RPMHPD_CX>, <&rpmhpd RPMHPD_MX>; power-domain-names = "cx", "mx"; qcom,smem-states = <&soccp_smp2p_out 0>, <&soccp_smp2p_out 8>; qcom,smem-state-names = "stop", "ping"; glink-edge { interrupts-extended = <&ipcc IPCC_MPROC_SOCCP IPCC_MPROC_SIGNAL_GLINK_QMP IRQ_TYPE_EDGE_RISING>; mboxes = <&ipcc IPCC_MPROC_SOCCP IPCC_MPROC_SIGNAL_GLINK_QMP>; label = "soccp"; qcom,remote-pid = <19>; /* ... */ }; };