# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/pinctrl/qcom,msm8952-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm MSM8952 TLMM pin controller maintainers: - Muzaffer Kadir description: Top Level Mode Multiplexer pin controller in Qualcomm MSM8952 SoC. properties: compatible: const: qcom,msm8952-pinctrl reg: maxItems: 1 interrupts: maxItems: 1 gpio-reserved-ranges: minItems: 1 maxItems: 66 gpio-line-names: maxItems: 134 patternProperties: "-state$": oneOf: - $ref: "#/$defs/qcom-msm8952-tlmm-state" - patternProperties: "-pins$": $ref: "#/$defs/qcom-msm8952-tlmm-state" additionalProperties: false $defs: qcom-msm8952-tlmm-state: type: object description: Pinctrl node's client devices use subnodes for desired pin configuration. Client device subnodes use below standard properties. $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state unevaluatedProperties: false properties: pins: description: List of gpio pins affected by the properties specified in this subnode. items: oneOf: - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-2][0-9]|13[0-3])$" - enum: [ qdsd_clk, qdsd_cmd, qdsd_data0, qdsd_data1, qdsd_data2, qdsd_data3, sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, sdc2_clk, sdc2_cmd, sdc2_data ] minItems: 1 maxItems: 36 function: description: Specify the alternative function to be configured for the specified pins. enum: [ gpio, blsp_uart1, blsp_spi1, adsp_ext, blsp_i2c1, prng_rosc, qdss_cti_trig_out_b0, qdss_cti_trig_out_a1, blsp_spi2, blsp_uart2, ldo_update, qdss_tracedata_b, pbs1, pwr_modem_enabled_b, blsp_i2c3, gcc_gp2_clk_b, atest_combodac_to_gpio_native, ldo_en, blsp_i2c2, gcc_gp1_clk_b, atest_gpsadc_dtest0_native, blsp_spi3, blsp_uart3, sec_mi2s, pbs0, gcc_gp3_clk_b, blsp_spi4, blsp_uart4, pbs2, pwr_nav_enabled_b, pwr_crypto_enabled_b, blsp_i2c4, blsp_spi5, blsp_uart5, qdss_traceclk_a, atest_bbrx1, qdss_tracectl_b, qdss_cti_trig_in_b0, blsp_i2c6, qdss_traceclk_b, atest_wlan0, m_voc, qdss_cti_trig_in_a0, atest_bbrx0, blsp_i2c5, qdss_tracectl_a, atest_gpsadc_dtest1_native, qdss_tracedata_a, blsp_spi6, blsp_uart6, atest_wlan1, mdp_vsync, pri_mi2s_mclk_a, sec_mi2s_mclk_a, cam_mclk, cci_i2c, pwr_modem_enabled_a, cci_timer0, cci_timer1, pwr_nav_enabled_a, pwr_crypto_enabled_a, cci_async, sd_write, qdss_cti_trig_out_a0, gcc_gp1_clk_a, gcc_gp2_clk_a, gcc_gp3_clk_a, blsp6_spi, qdss_cti_trig_in_b1, uim_batt, qdss_cti_trig_out_b1, uim1_data, uim1_clk, uim1_reset, uim1_present, uim2_data, uim2_clk, uim2_reset, uim2_present, uim3_data, usb_fs, uim3_clk, uim3_reset, uim3_present, atest_char3, dbg_out, bimc_dte0, sec_mi2s_mclk_b, pri_mi2s, atest_char1, ebi_cdc, atest_char0, cdc_pdm0, pri_mi2s_mclk_b, lpass_slimbus, lpass_slimbus0, lpass_slimbus1, wcss_bt, atest_char2, ebi_ch0, wcss_wlan2, wcss_wlan1, wcss_wlan0, wcss_wlan, wcss_fm, ext_lpass, gcc_tlmm, dmic0_clk, dmic0_data, qdss_cti_trig_in_a1, blsp_spi7, blsp_uart7, pri_mi2s_ws, wsa_io, blsp_i2c7, blsp_spi8, blsp_uart8, blsp_i2c8, gcc_plltest, nav_pps_in_a, pa_indicator, nav_pps_in_b, nav_pps, modem_tsync, nav_tsync, ssbi_wtr1, gsm1_tx, gsm0_tx, atest_char, atest_tsens, bimc_dte1, gp_mn, gp_pdm_0a, gp_pdm_0b, gp_pdm_1a, gp_pdm_1b, gp_pdm_2a, gp_pdm_2b, gp0_clk, gp1_clk] required: - pins allOf: - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# required: - compatible - reg unevaluatedProperties: false examples: - | #include msmgpio: pinctrl@1000000 { compatible = "qcom,msm8952-pinctrl"; reg = <0x01000000 0x300000>; interrupts = ; gpio-controller; gpio-ranges = <&msmgpio 0 0 134>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; blsp1-uart2-sleep-state { pins = "gpio4", "gpio5"; function = "gpio"; drive-strength = <2>; bias-pull-down; }; spi1-default-state { spi-pins { pins = "gpio0", "gpio1", "gpio3"; function = "blsp_spi1"; drive-strength = <12>; bias-disable; }; cs-pins { pins = "gpio2"; function = "blsp_spi1"; drive-strength = <2>; bias-disable; }; }; };