# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra238-pinmux-common.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NVIDIA Tegra238 Pinmux Controller

maintainers:
  - Thierry Reding <thierry.reding@gmail.com>
  - Jon Hunter <jonathanh@nvidia.com>

$ref: nvidia,tegra-pinmux-common.yaml

properties:
  nvidia,function:
    enum: [ dca_vsync, dca_hsync, displaya, rsvd0, i2c7_clk, i2c7_dat,
            i2c4_dat, i2c4_clk, i2c9_dat, i2c9_clk, usb_vbus_en0,
            usb_vbus_en1, spi3_din, spi1_cs0, spi3_cs0, spi1_din,
            spi3_cs1, spi1_sck, spi3_sck, spi1_cs1, spi1_dout, spi3_dout,
            gp_pwm5, gp_pwm6, extperiph2_clk, extperiph1_clk, i2c3_dat,
            i2c3_clk, extperiph4_clk, extperiph3_clk, dmic2_dat,
            dmic2_clk, uarta_cts, uarta_rts, uarta_rxd, uarta_txd,
            i2c5_clk, i2c5_dat, uartd_cts, uartd_rts, uartd_rxd,
            uartd_txd, i2c1_clk, i2c1_dat, sdmmc1_cd, i2s2_sclk,
            i2s2_sdata_out, i2s2_sdata_in, i2s2_lrck, i2s4_sclk,
            i2s4_sdata_out, i2s4_sdata_in, i2s4_lrck, i2s1_sclk,
            i2s1_sdata_out, i2s1_sdata_in, i2s1_lrck, aud_mclk,
            i2s3_lrck, i2s3_sclk, i2s3_sdata_in, i2s3_sdata_out,
            pe2_clkreq_l, pe1_clkreq_l, pe1_rst_l, pe0_clkreq_l,
            pe0_rst_l, pe2_rst_l, pe3_clkreq_l, pe3_rst_l,
            dp_aux_ch0_hpd, qspi0_io0, qspi0_io1, qspi0_sck, qspi0_cs_n,
            uartg_cts, uartg_rts, uartg_txd, uartg_rxd, sdmmc1_clk,
            sdmmc1_cmd, sdmmc1_comp, sdmmc1_dat3, sdmmc1_dat2,
            sdmmc1_dat1, sdmmc1_dat0, ufs0, soc_therm_oc1, hdmi_cec,
            gp_pwm4, uartc_rxd, uartc_txd, i2c8_dat, i2c8_clk,
            spi2_dout, i2c2_clk, spi2_cs0, i2c2_dat, spi2_sck, spi2_din,
            ppc_mode_1, ppc_ready, ppc_mode_2, ppc_cc, ppc_mode_0,
            ppc_int_n, uarte_txd, uarte_rxd, uartb_txd, uartb_rxd,
            uartb_cts, uartb_rts, uarte_cts, uarte_rts, gp_pwm7,
            gp_pwm2, gp_pwm3, gp_pwm1, spi2_cs1, dmic1_clk, dmic1_dat,
            rsvd1, dcb_hsync, dcb_vsync, soc_therm_oc4, gp_pwm8,
            nv_therm_fan_tach0, wdt_reset_outa, ccla_la_trigger_mux,
            dspk1_dat, dspk1_clk, nv_therm_fan_tach1, dspk0_dat,
            dspk0_clk, i2s5_sclk, i2s6_lrck, i2s6_sdata_in, i2s6_sclk,
            i2s6_sdata_out, i2s5_lrck, i2s5_sdata_out, i2s5_sdata_in,
            sdmmc1_pe3_rst_l, sdmmc1_pe3_clkreq_l, touch_clk,
            ppc_i2c_dat, wdt_reset_outb, spi5_cs1, ppc_rst_n,
            ppc_i2c_clk, spi4_cs1, soc_therm_oc3, spi5_sck, spi5_miso,
            spi4_sck, spi4_miso, spi4_cs0, spi4_mosi, spi5_cs0,
            spi5_mosi, led_blink, rsvd2, dmic3_clk, dmic3_dat,
            dmic4_clk, dmic4_dat, tsc_edge_out0, tsc_edge_out3,
            tsc_edge_out1, tsc_edge_out2, dmic5_clk, dmic5_dat, rsvd3,
            sdmmc1_wp, tsc_edge_out0a, tsc_edge_out0d, tsc_edge_out0b,
            tsc_edge_out0c, soc_therm_oc2 ]

  # out of the common properties, only these are allowed for Tegra238
  nvidia,pins: true
  nvidia,pull: true
  nvidia,tristate: true
  nvidia,schmitt: true
  nvidia,enable-input: true
  nvidia,open-drain: true
  nvidia,lock: true
  nvidia,drive-type: true
  nvidia,io-hv: true

required:
  - nvidia,pins

additionalProperties: false

...