# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/mediatek,mt8196-pcie-sphy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: MediaTek PCI-Express Gen4 S-PHY

maintainers:
  - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

description:
  The MediaTek PCI-Express Gen4 S-PHY is capable of data serialization
  and de-serialization with 8, 10, 128 or 130 bits (16GT/s) encoding
  and decoding, has analog buffers, elastic buffers and mechanisms for
  receiver detection.
  This PHY supports link rates of 2.5, 5.0, 8.0 and 16.0 GT/s per-lane
  in both Root Complex (RC) and End Point (EP) modes, depending on the
  chosen port.
  The Digital PHY (PHYD) part adheres to the Intel PIPE (PHY Interface
  for the PCIe) specification.

properties:
  compatible:
    const: mediatek,mt8196-pcie-sphy

  reg:
    items:
      - description: System Interface (SIF) registers
      - description: Clock Management (CKM) registers

  reg-names:
    items:
      - const: sif
      - const: ckm

  "#phy-cells":
    const: 0

  nvmem-cells:
    items:
      - description: Internal resistor selection of TX Bias Current
      - description: XTP Bias V2V voltage calibration
      - description: S-PLL CKTX Impedance Selection (P-MOSFET side)
      - description: S-PLL CKTX Impedance Selection (N-MOSFET side)
      - description: S-PLL CKTX Intermediate Transition Impedance
      - description: RX Front-End Return Loss Continuous Time Linear EQ
      - description: RX Front-End Return Loss Variable Gain Amplifier
      - description: RX Front-End Return Loss Decision Feedback EQ
      - description: RX Impedance Selection
      - description: TX Impedance Selection (P-MOSFET side)
      - description: TX Impedance Selection (N-MOSFET side)
      - description: TX Lane 0 Switch Resistance (RSWn)
      - description: TX Lane 1 Switch Resistance (RSWn)
      - description: eFuse calibration table version

  nvmem-cell-names:
    items:
      - const: int-r
      - const: xtp-vtrim
      - const: cktx-pmos
      - const: cktx-nmos
      - const: cktx-r-mid
      - const: rxfe-lanes-rl-ctle
      - const: rxfe-lanes-rl-vga
      - const: rxfe-lanes-rl-dfe
      - const: rx-lanes-imp
      - const: tx-lanes-pmos
      - const: tx-lanes-nmos
      - const: tx-ln0-rswn
      - const: tx-ln1-rswn
      - const: cal-version

  power-domains:
    maxItems: 1

required:
  - compatible
  - reg
  - reg-names
  - "#phy-cells"

additionalProperties: false

examples:
  - |
    phy@16900000 {
        compatible = "mediatek,mt8196-pcie-sphy";
        reg = <0x16900000 0x10000>, <0x16920000 0x10000>;
        reg-names = "sif", "ckm";
        power-domains = <&spm 10>;
        #phy-cells = <0>;
    };