# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/phy/fsl,lynx-28g.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Freescale Lynx 28G SerDes PHY maintainers: - Ioana Ciornei description: The Lynx 28G is a multi-lane, multi-protocol SerDes (PCIe, SATA, Ethernet) present in multiple instances on NXP LX2160A and LX2162A SoCs. All instances share a common register map and programming model, however they differ in supported protocols per lane in a way that is not detectable by said programming model without prior knowledge. The distinction is made through the compatible string. properties: compatible: oneOf: - const: fsl,lynx-28g deprecated: true description: Legacy compatibility string for Lynx 28G SerDes. Any assumption regarding whether a certain lane supports a certain protocol may be incorrect. Deprecated except when used as a fallback. Use device-specific strings instead. - items: - const: fsl,lx2160a-serdes1 - const: fsl,lynx-28g - items: - const: fsl,lx2160a-serdes2 - const: fsl,lynx-28g - items: - const: fsl,lx2162a-serdes1 - const: fsl,lynx-28g - items: - const: fsl,lx2162a-serdes2 - const: fsl,lynx-28g - const: fsl,lx2160a-serdes3 reg: maxItems: 1 "#phy-cells": const: 1 "#address-cells": const: 1 "#size-cells": const: 0 patternProperties: "^phy@[0-7]$": type: object description: SerDes lane (single RX/TX differential pair) properties: reg: minimum: 0 maximum: 7 description: Lane index as seen in register map "#phy-cells": const: 0 required: - reg - "#phy-cells" additionalProperties: false required: - compatible - reg - "#phy-cells" allOf: # LX2162A SerDes 1 has fewer lanes than the others - if: properties: compatible: contains: const: fsl,lx2162a-serdes1 then: patternProperties: "^phy@[0-7]$": properties: reg: minimum: 4 maximum: 7 additionalProperties: false examples: - | soc { #address-cells = <2>; #size-cells = <2>; serdes@1ea0000 { compatible = "fsl,lx2160a-serdes1", "fsl,lynx-28g"; reg = <0x0 0x1ea0000 0x0 0x1e30>; #address-cells = <1>; #size-cells = <0>; #phy-cells = <1>; phy@0 { reg = <0>; #phy-cells = <0>; }; phy@1 { reg = <1>; #phy-cells = <0>; }; phy@2 { reg = <2>; #phy-cells = <0>; }; phy@3 { reg = <3>; #phy-cells = <0>; }; phy@4 { reg = <4>; #phy-cells = <0>; }; phy@5 { reg = <5>; #phy-cells = <0>; }; phy@6 { reg = <6>; #phy-cells = <0>; }; phy@7 { reg = <7>; #phy-cells = <0>; }; }; };