# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/pci/qcom,pcie-msm8996.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm MSM8996 PCI Express Root Complex maintainers: - Bjorn Andersson - Manivannan Sadhasivam properties: compatible: oneOf: - enum: - qcom,pcie-msm8996 - items: - const: qcom,pcie-msm8998 - const: qcom,pcie-msm8996 reg: minItems: 4 maxItems: 5 reg-names: minItems: 4 items: - const: parf - const: dbi - const: elbi - const: config - const: mhi clocks: maxItems: 5 clock-names: items: - const: pipe # Pipe Clock driving internal logic - const: aux - const: cfg - const: bus_master # Master AXI clock - const: bus_slave # Slave AXI clock interrupts: minItems: 8 maxItems: 9 interrupt-names: minItems: 8 items: - const: msi0 - const: msi1 - const: msi2 - const: msi3 - const: msi4 - const: msi5 - const: msi6 - const: msi7 - const: global vdda-supply: description: A phandle to the core analog power supply vddpe-3v3-supply: description: A phandle to the PCIe endpoint power supply required: - power-domains allOf: - $ref: qcom,pcie-common.yaml# unevaluatedProperties: false examples: - | #include #include #include pcie@600000 { compatible = "qcom,pcie-msm8996"; reg = <0x00600000 0x2000>, <0x0c000000 0xf1d>, <0x0c000f20 0xa8>, <0x0c100000 0x100000>; reg-names = "parf", "dbi", "elbi", "config"; ranges = <0x01000000 0x0 0x00000000 0x0c200000 0x0 0x100000>, <0x02000000 0x0 0x0c300000 0x0c300000 0x0 0xd00000>; device_type = "pci"; bus-range = <0x00 0xff>; num-lanes = <1>; #address-cells = <3>; #size-cells = <2>; linux,pci-domain = <0>; clocks = <&gcc GCC_PCIE_0_PIPE_CLK>, <&gcc GCC_PCIE_0_AUX_CLK>, <&gcc GCC_PCIE_0_CFG_AHB_CLK>, <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, <&gcc GCC_PCIE_0_SLV_AXI_CLK>; clock-names = "pipe", "aux", "cfg", "bus_master", "bus_slave"; interrupts = , , , , , , , ; interrupt-names = "msi0", "msi1", "msi2", "msi3", "msi4", "msi5", "msi6", "msi7"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &intc GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ <0 0 0 2 &intc GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ <0 0 0 3 &intc GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ <0 0 0 4 &intc GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ pinctrl-names = "default", "sleep"; pinctrl-0 = <&pcie0_state_on>; pinctrl-1 = <&pcie0_state_off>; phys = <&pciephy_0>; phy-names = "pciephy"; power-domains = <&gcc PCIE0_GDSC>; perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>; vddpe-3v3-supply = <&wlan_en>; vdda-supply = <&vreg_l28a_0p925>; pcie@0 { device_type = "pci"; reg = <0x0 0x0 0x0 0x0 0x0>; bus-range = <0x01 0xff>; #address-cells = <3>; #size-cells = <2>; ranges; }; };