# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/media/qcom,milos-iris.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Milos SoC Iris video encoder and decoder maintainers: - Alexander Koskovich description: The Iris video processing unit on Qualcomm Milos SoC is a video encode and decode accelerator. properties: compatible: enum: - qcom,milos-iris clocks: maxItems: 3 clock-names: items: - const: iface - const: core - const: vcodec0_core dma-coherent: true interconnects: maxItems: 2 interconnect-names: items: - const: cpu-cfg - const: video-mem iommus: maxItems: 2 operating-points-v2: true opp-table: type: object power-domains: maxItems: 4 power-domain-names: items: - const: venus - const: vcodec0 - const: cx - const: mx resets: maxItems: 2 reset-names: items: - const: bus - const: core required: - compatible - dma-coherent - interconnects - interconnect-names - iommus - power-domain-names - resets - reset-names allOf: - $ref: qcom,venus-common.yaml# unevaluatedProperties: false examples: - | #include #include #include #include #include #include #include #include video-codec@aa00000 { compatible = "qcom,milos-iris"; reg = <0x0aa00000 0xf0000>; clocks = <&gcc GCC_VIDEO_AXI0_CLK>, <&videocc VIDEO_CC_MVS0C_CLK>, <&videocc VIDEO_CC_MVS0_CLK>; clock-names = "iface", "core", "vcodec0_core"; dma-coherent; iommus = <&apps_smmu 0x1960 0>, <&apps_smmu 0x1967 0>; interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY &cnoc_cfg SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, <&mmss_noc MASTER_VIDEO QCOM_ICC_TAG_ALWAYS &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; interconnect-names = "cpu-cfg", "video-mem"; interrupts = ; operating-points-v2 = <&iris_opp_table>; memory-region = <&video_mem>; power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>, <&videocc VIDEO_CC_MVS0_GDSC>, <&rpmhpd RPMHPD_CX>, <&rpmhpd RPMHPD_MX>; power-domain-names = "venus", "vcodec0", "cx", "mx"; resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>, <&videocc VIDEO_CC_MVS0C_CLK_ARES>; reset-names = "bus", "core"; iris_opp_table: opp-table { compatible = "operating-points-v2"; opp-240000000 { opp-hz = /bits/ 64 <240000000>; required-opps = <&rpmhpd_opp_low_svs>, <&rpmhpd_opp_svs>; }; opp-338000000 { opp-hz = /bits/ 64 <338000000>; required-opps = <&rpmhpd_opp_svs>, <&rpmhpd_opp_svs>; }; opp-366000000 { opp-hz = /bits/ 64 <366000000>; required-opps = <&rpmhpd_opp_svs_l1>, <&rpmhpd_opp_svs>; }; opp-444000000 { opp-hz = /bits/ 64 <444000000>; required-opps = <&rpmhpd_opp_nom>, <&rpmhpd_opp_svs_l1>; }; opp-552000000 { opp-hz = /bits/ 64 <552000000>; required-opps = <&rpmhpd_opp_turbo>, <&rpmhpd_opp_nom>; }; }; };