# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/iio/dac/adi,max22007.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Analog Devices MAX22007 DAC maintainers: - Janani Sunil description: The MAX22007 is a quad-channel, 12-bit digital-to-analog converter (DAC) with integrated precision output amplifiers and current output capability. Each channel can be independently configured for voltage or current output. Datasheet available at https://www.analog.com/en/products/max22007.html $ref: /schemas/spi/spi-peripheral-props.yaml# properties: compatible: const: adi,max22007 reg: maxItems: 1 spi-max-frequency: maximum: 500000 '#address-cells': const: 1 '#size-cells': const: 0 vdd-supply: description: Low-Voltage Power Supply from +2.7V to +5.5V. hvdd-supply: description: Positive High-Voltage Power Supply from +8V to (HVSS +24V) for the Output Channels. hvss-supply: description: Optional Negative High-Voltage Power Supply from -2V to 0V for the Output Channels. For most applications HVSS can be connected to GND (0V), but for applications requiring output down to true 0V or 0mA, connect to a -2V supply. reset-gpios: maxItems: 1 description: Active low GPIO. patternProperties: "^channel@[0-3]$": $ref: /schemas/iio/dac/dac.yaml# type: object description: Represents the external channels which are connected to the DAC. properties: reg: description: Channel number items: minimum: 0 maximum: 3 adi,ch-func: description: Channel output type. Use CH_FUNC_VOLTAGE_OUTPUT for voltage output or CH_FUNC_CURRENT_OUTPUT for current output. $ref: /schemas/types.yaml#/definitions/uint32 enum: [1, 2] required: - reg - adi,ch-func unevaluatedProperties: false required: - compatible - reg - vdd-supply - hvdd-supply unevaluatedProperties: false examples: - | #include #include spi { #address-cells = <1>; #size-cells = <0>; dac@0 { compatible = "adi,max22007"; reg = <0>; spi-max-frequency = <500000>; reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>; vdd-supply = <&vdd_reg>; hvdd-supply = <&hvdd_reg>; #address-cells = <1>; #size-cells = <0>; channel@0 { reg = <0>; adi,ch-func = ; }; channel@1 { reg = <1>; adi,ch-func = ; }; }; }; ...