# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/iio/adc/adi,ad7768.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Analog Devices AD7768 and AD7768-4 ADC maintainers: - Janani Sunil description: | The AD7768 is an 8-channel, 24-bit simultaneous sampling ADC with configurable power and performance modes. The AD7768-4 is a 4-channel version. This binding covers SPI mode only (register access via SPI). Pin control mode, where configuration is set via hardware pins rather than SPI registers, is not supported. The io-backend represents the high-speed data output interface, consuming the DOUTx data lines, DCLK (data clock), and DRDY (data ready) signals. Datasheet at: https://www.analog.com/media/en/technical-documentation/data-sheets/ad7768-ad7768-4.pdf HDL reference design: https://github.com/analogdevicesinc/hdl/tree/main/projects/ad7768evb properties: compatible: enum: - adi,ad7768 - adi,ad7768-4 reg: maxItems: 1 clocks: maxItems: 1 clock-names: description: Describes the type of master clock (MCLK) attached to the XTAL1 and XTAL2/MCLK pins. A CMOS clock is supplied on the XTAL2/MCLK pin, a crystal oscillator is connected between the XTAL1 and XTAL2 pins, and an LVDS differential clock is supplied on the XTAL1/XTAL2 pin pair. CMOS and LVDS clocks must operate from 1.15 MHz to 34 MHz. Crystals must operate from 8 MHz to 34 MHz. enum: - mclk - xtal - lvds avdd1-supply: description: Analog supply. Its voltage is used to derive the supply-dependent VCM output level, so it must be a regulator that can report its voltage. avss-supply: description: Negative analog supply. If omitted, AVSS is assumed to be at system ground. avdd2-supply: true iovdd-supply: true ref1p-supply: true ref1n-supply: description: Negative reference input supply for REF1. If omitted, REF1- is assumed to be connected to ground. ref2p-supply: true ref2n-supply: description: Negative reference input supply for REF2. If omitted, REF2- is assumed to be connected to ground. reset-gpios: maxItems: 1 description: GPIO connected to the active-low RESET pin start-gpios: maxItems: 1 description: GPIO connected to the START pin. An active-low pulse on this pin synchronizes the device to other AD7768 devices. When not used, this pin must be tied to a logic high level through a pull-up resistor. When used, SYNC_OUT must be wired back to SYNC_IN on all devices in the synchronization chain. sync-in-gpios: maxItems: 1 description: GPIO connected to the SYNC_IN pin. Receives the synchronization pulse generated on SYNC_OUT in response to a START pulse. Must be synchronous to the MCLK clock domain. In multi-device or daisy-chained systems, two successive synchronization pulses must be applied to guarantee all ADCs are synchronized. gpio-controller: true '#gpio-cells': const: 2 adi,data-lines-number: $ref: /schemas/types.yaml#/definitions/uint32 enum: [1, 2, 4, 8] description: Number of DOUTx lines used for the high-speed data output interface (distinct from the SPI control interface). AD7768 supports 1, 2, or 8 lines; AD7768-4 supports 1 or 4 lines. Defaults to the maximum number of lines for the selected variant if omitted. regulators: type: object description: Container for the on-chip VCM regulator. additionalProperties: false properties: vcm-output: type: object description: Buffered common-mode voltage output on the VCM pin. Use regulator-always-on when no consumer node references this output. Channel 0 must be present and enabled while VCM is used, since putting channel 0 in standby disables the VCM output. $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false io-backends: maxItems: 1 '#address-cells': const: 1 '#size-cells': const: 0 patternProperties: "^channel@[0-7]$": type: object description: Represents the external channels which are connected to the device. AD7768 supports channels 0-7, AD7768-4 supports channels 0-3. properties: reg: minimum: 0 maximum: 7 description: The channel number adi,prechargebuf-pos-enable: type: boolean description: Enable positive input precharge buffer adi,prechargebuf-neg-enable: type: boolean description: Enable negative input precharge buffer adi,refbuf-pos-enable: type: boolean description: Enable positive reference buffer adi,refbuf-neg-enable: type: boolean description: Enable negative reference buffer required: - reg additionalProperties: false required: - compatible - reg - clocks - clock-names - avdd1-supply - avdd2-supply - iovdd-supply - ref1p-supply - ref2p-supply - io-backends allOf: - $ref: /schemas/spi/spi-peripheral-props.yaml# - if: properties: compatible: contains: const: adi,ad7768-4 then: properties: adi,data-lines-number: enum: [1, 4] patternProperties: "^channel@[0-3]$": properties: reg: maximum: 3 "^channel@[4-7]$": false else: properties: adi,data-lines-number: enum: [1, 2, 8] unevaluatedProperties: false examples: - | #include spi { #address-cells = <1>; #size-cells = <0>; adc@0 { compatible = "adi,ad7768"; reg = <0>; spi-max-frequency = <1000000>; avdd1-supply = <&avdd1_regulator>; avss-supply = <&avss_regulator>; avdd2-supply = <&avdd2_regulator>; iovdd-supply = <&iovdd_regulator>; ref1p-supply = <&ref1p_regulator>; ref1n-supply = <&ref1n_regulator>; ref2p-supply = <&ref2p_regulator>; ref2n-supply = <&ref2n_regulator>; reset-gpios = <&gpio0 86 GPIO_ACTIVE_LOW>; clocks = <&ad7768_mclk>; clock-names = "mclk"; adi,data-lines-number = <8>; gpio-controller; #gpio-cells = <2>; io-backends = <&iio_backend>; #address-cells = <1>; #size-cells = <0>; channel@0 { reg = <0>; adi,prechargebuf-pos-enable; adi,refbuf-pos-enable; }; channel@1 { reg = <1>; adi,prechargebuf-pos-enable; adi,prechargebuf-neg-enable; adi,refbuf-pos-enable; adi,refbuf-neg-enable; }; channel@7 { reg = <7>; adi,prechargebuf-pos-enable; adi,refbuf-pos-enable; }; }; }; ...