# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/bridge/thead,th1520-dw-hdmi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: T-Head TH1520 DesignWare HDMI TX Encoder

maintainers:
  - Icenowy Zheng <uwu@icenowy.me>

description:
  The HDMI transmitter is a Synopsys DesignWare HDMI TX controller
  paired with a DesignWare HDMI Gen2 TX PHY.

allOf:
  - $ref: /schemas/display/bridge/synopsys,dw-hdmi.yaml#

properties:
  compatible:
    enum:
      - thead,th1520-dw-hdmi

  reg-io-width:
    const: 4

  clocks:
    maxItems: 4

  clock-names:
    items:
      - const: iahb
      - const: isfr
      - const: cec
      - const: pix

  resets:
    items:
      - description: Main reset
      - description: Configuration APB reset

  reset-names:
    items:
      - const: main
      - const: apb

  ports:
    $ref: /schemas/graph.yaml#/properties/ports

    properties:
      port@0:
        $ref: /schemas/graph.yaml#/properties/port
        description: Input port connected to DC8200 DPU "DP" output

      port@1:
        $ref: /schemas/graph.yaml#/properties/port
        description: HDMI output port

    required:
      - port@0
      - port@1

required:
  - compatible
  - reg
  - reg-io-width
  - clocks
  - clock-names
  - resets
  - reset-names
  - interrupts
  - ports

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    #include <dt-bindings/clock/thead,th1520-clk-ap.h>
    #include <dt-bindings/reset/thead,th1520-reset.h>

    soc {
      #address-cells = <2>;
      #size-cells = <2>;

      hdmi@ffef540000 {
        compatible = "thead,th1520-dw-hdmi";
        reg = <0xff 0xef540000 0x0 0x40000>;
        reg-io-width = <4>;
        interrupts = <111 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&clk_vo CLK_HDMI_PCLK>,
                 <&clk_vo CLK_HDMI_SFR>,
                 <&clk_vo CLK_HDMI_CEC>,
                 <&clk_vo CLK_HDMI_PIXCLK>;
        clock-names = "iahb", "isfr", "cec", "pix";
        resets = <&rst_vo TH1520_RESET_ID_HDMI>,
                 <&rst_vo TH1520_RESET_ID_HDMI_APB>;
        reset-names = "main", "apb";

        ports {
          #address-cells = <1>;
          #size-cells = <0>;
          port@0 {
            reg = <0>;

            hdmi_in: endpoint {
              remote-endpoint = <&dpu_out_dp1>;
            };
          };

          port@1 {
            reg = <1>;

            hdmi_out_conn: endpoint {
              remote-endpoint = <&hdmi_conn_in>;
            };
          };
        };
      };
    };