# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/ti/ti,dm814-adpll-clock.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Texas Instruments DM814x ADPLL Clock

maintainers:
  - Tony Lindgren <tony@atomide.com>

description:
  The ADPLL is a register-mapped clock generator found on TI DM814x SoCs. It
  provides multiple output clocks from two or three selectable input clocks and
  three to four children.

properties:
  compatible:
    enum:
      - ti,dm814-adpll-s-clock
      - ti,dm814-adpll-lj-clock

  reg:
    maxItems: 1

  '#clock-cells':
    const: 1

  clocks:
    minItems: 2
    maxItems: 3

  clock-names:
    minItems: 2
    items:
      - const: clkinp
      - const: clkinpulow
      - const: clkinphif

  clock-output-names:
    minItems: 3
    maxItems: 4

required:
  - compatible
  - reg
  - '#clock-cells'
  - clocks
  - clock-output-names

if:
  properties:
    compatible:
      contains:
        const: ti,dm814-adpll-s-clock
then:
  properties:
    clocks:
      minItems: 3
    clock-names:
      minItems: 3
    clock-output-names:
      minItems: 4

else:
  properties:
    clocks:
      maxItems: 2
    clock-names:
      maxItems: 2
    clock-output-names:
      maxItems: 3

additionalProperties: false

examples:
  - |
    adpll@40 {
        compatible = "ti,dm814-adpll-s-clock";
        reg = <0x40 0x40>;
        #clock-cells = <1>;
        clocks = <&devosc_ck &devosc_ck &devosc_ck>;
        clock-names = "clkinp", "clkinpulow", "clkinphif";
        clock-output-names = "481c5040.adpll.dcoclkldo",
                             "481c5040.adpll.clkout",
                             "481c5040.adpll.clkoutx2",
                             "481c5040.adpll.clkouthif";
    };