# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/ti/davinci/ti,da850-pll.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: TI DaVinci PLL Controllers maintainers: - David Lechner description: The PLL provides clocks to most of the components on the SoC. In addition to the PLL itself, this controller also contains bypasses, gates, dividers, an multiplexers for various clock signals. properties: compatible: enum: - ti,da850-pll0 - ti,da850-pll1 reg: maxItems: 1 clocks: minItems: 1 items: - description: Primary reference clock input - description: External clock source clock-names: minItems: 1 items: - const: clksrc - const: extclksrc ti,clkmode-square-wave: type: boolean description: Indicates that the board is supplying a square wave input on the OSCIN pin instead of using a crystal oscillator. pllout: type: object description: Main PLL clock output before POSTDIV. properties: '#clock-cells': const: 0 required: - '#clock-cells' additionalProperties: false sysclk: type: object description: PLLDIVn divider clocks that provide the SYSCLKn clock domains. Consumers of this node should use "n" in "SYSCLKn" as the index parameter for the clock cell. properties: '#clock-cells': const: 1 required: - '#clock-cells' additionalProperties: false auxclk: type: object description: AUXCLK output of the PLL properties: '#clock-cells': const: 0 required: - '#clock-cells' additionalProperties: false obsclk: type: object description: the OBSCLK output of the PLL. properties: '#clock-cells': const: 0 required: - '#clock-cells' additionalProperties: false required: - compatible - reg - clocks - clock-names additionalProperties: false allOf: - if: properties: compatible: const: ti,da850-pll1 then: properties: clocks: maxItems: 1 clock-names: maxItems: 1 ti,clkmode-square-wave: false auxclk: false examples: - | clock-controller@11000 { compatible = "ti,da850-pll0"; reg = <0x11000 0x1000>; clocks = <&ref_clk>, <&pll1_sysclk 3>; clock-names = "clksrc", "extclksrc"; ti,clkmode-square-wave; pllout { #clock-cells = <0>; }; sysclk { #clock-cells = <1>; }; auxclk { #clock-cells = <0>; }; obsclk { #clock-cells = <0>; }; }; - | clock-controller@21a000 { compatible = "ti,da850-pll1"; reg = <0x21a000 0x1000>; clocks = <&ref_clk>; clock-names = "clksrc"; sysclk { #clock-cells = <1>; }; obsclk { #clock-cells = <0>; }; };