# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/starfive,jhb100-sys1crg.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: StarFive JHB100 System-1 Clock and Reset Generator

maintainers:
  - Changhuang Liang <changhuang.liang@starfivetech.com>

properties:
  compatible:
    const: starfive,jhb100-sys1crg

  reg:
    maxItems: 1

  clocks:
    items:
      - description: Main Oscillator (25 MHz)
      - description: PLL0
      - description: PLL1
      - description: PLL2
      - description: PLL4
      - description: PLL5
      - description: NPU Non Coherent NOC Initiator

  clock-names:
    items:
      - const: osc
      - const: pll0
      - const: pll1
      - const: pll2
      - const: pll4
      - const: pll5
      - const: npu_ncnoc_init

  '#clock-cells':
    const: 1
    description:
      See <dt-bindings/clock/starfive,jhb100-crg.h> for valid indices.

  '#reset-cells':
    const: 1
    description:
      See <dt-bindings/reset/starfive,jhb100-crg.h> for valid indices.

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - '#clock-cells'
  - '#reset-cells'

additionalProperties: false

examples:
  - |
    clock-controller@13004000 {
      compatible = "starfive,jhb100-sys1crg";
      reg = <0x13004000 0x4000>;
      clocks = <&osc>, <&pll0>, <&pll1>,
               <&syspll 0>, <&syspll 2>,
               <&syspll 3>, <&sys0crg 61>;
      clock-names = "osc", "pll0", "pll1", "pll2",
                    "pll4", "pll5", "npu_ncnoc_init";
      #clock-cells = <1>;
      #reset-cells = <1>;
    };