# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/starfive,jhb100-per1crg.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: StarFive JHB100 Peripheral-1 Clock and Reset Generator

maintainers:
  - Changhuang Liang <changhuang.liang@starfivetech.com>

properties:
  compatible:
    const: starfive,jhb100-per1crg

  reg:
    maxItems: 1

  clocks:
    items:
      - description: PLL7
      - description: Non Coherent NOC Initiator
      - description: Configure 800MHz
      - description: Non Coherent NOC Target
      - description: Configure 143MHz

  clock-names:
    items:
      - const: pll7
      - const: ncnoc_init
      - const: cfg_800
      - const: ncnoc_targ
      - const: cfg_143

  '#clock-cells':
    const: 1
    description:
      See <dt-bindings/clock/starfive,jhb100-crg.h> for valid indices.

  '#reset-cells':
    const: 1
    description:
      See <dt-bindings/reset/starfive,jhb100-crg.h> for valid indices.

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - '#clock-cells'
  - '#reset-cells'

additionalProperties: false

examples:
  - |
    clock-controller@11b40000 {
      compatible = "starfive,jhb100-per1crg";
      reg = <0x11b40000 0x1000>;
      clocks = <&pll7>,
               <&sys0crg 68>,
               <&sys0crg 69>,
               <&sys2crg 19>,
               <&sys2crg 22>;
      clock-names = "pll7", "ncnoc_init",
                    "cfg_800", "ncnoc_targ",
                    "cfg_143";
      #clock-cells = <1>;
      #reset-cells = <1>;
    };