# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/samsung,exynos5515-cmu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Samsung Exynos5515 SoC clock controller

maintainers:
  - Aiden Isik <aidenisik+git@member.fsf.org>
  - Chanwoo Choi <cw00.choi@samsung.com>
  - Krzysztof Kozlowski <krzk@kernel.org>

description: |
  Exynos5515 clock controller is comprised of several CMU units, generating
  clocks for different domains. Those CMU units are modeled as separate device
  tree nodes, and might depend on each other. The root clock in that root tree
  is an external clock: OSCCLK (26 MHz). This external clock must be defined
  as a fixed-rate clock in dts.

  CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
  dividers; all other clocks of function blocks (other CMUs) are usually
  derived from CMU_TOP.

  Each clock is assigned an identifier and client nodes can use this identifier
  to specify the clock which they consume. All clocks available for usage
  in clock consumer nodes are defined as preprocessor macros in
  'include/dt-bindings/clock/samsung,exynos5515-cmu.h' header.

properties:
  compatible:
    enum:
      - samsung,exynos5515-cmu-fsys
      - samsung,exynos5515-cmu-peri
      - samsung,exynos5515-cmu-top

  clocks:
    minItems: 1
    maxItems: 5

  clock-names:
    minItems: 1
    maxItems: 5

  "#clock-cells":
    const: 1

  reg:
    maxItems: 1

  samsung,sysreg:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      Phandle to system registers interface.

required:
  - compatible
  - clocks
  - clock-names
  - "#clock-cells"
  - reg
  - samsung,sysreg

allOf:
  - if:
      properties:
        compatible:
          contains:
            enum:
              - samsung,exynos5515-cmu-fsys

    then:
      properties:
        clocks:
          items:
            - description: External reference clock (26MHz)
            - description: CMU_FSYS BUS clock (from CMU_TOP)
            - description: CMU_FSYS MMC card clock (from CMU_TOP)
            - description: CMU_FSYS MMC embedded clock (from CMU_TOP)
            - description: CMU_FSYS USB20DRD clock (from CMU_TOP)

        clock-names:
          items:
            - const: oscclk
            - const: bus
            - const: mmc_card
            - const: mmc_embd
            - const: usb20drd

  - if:
      properties:
        compatible:
          contains:
            enum:
              - samsung,exynos5515-cmu-peri

    then:
      properties:
        clocks:
          items:
            - description: External reference clock (26MHz)
            - description: CMU_PERI BUS clock (from CMU_TOP)
            - description: CMU_PERI IP clock (from CMU_TOP)
            - description: CMU_PERI UART clock (from CMU_TOP)

        clock-names:
          items:
            - const: oscclk
            - const: bus
            - const: ip
            - const: uart

  - if:
      properties:
        compatible:
          contains:
            const: samsung,exynos5515-cmu-top

    then:
      properties:
        clocks:
          items:
            - description: External reference clock (26 MHz)

        clock-names:
          items:
            - const: oscclk

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/samsung,exynos5515-cmu.h>

    cmu_top: clock-controller@15410000 {
        compatible = "samsung,exynos5515-cmu-top";
        reg = <0x15410000 0x10000>;
        #clock-cells = <1>;

        clocks = <&oscclk>;
        clock-names = "oscclk";
        samsung,sysreg = <&sysreg_top>;
    };

...