Don't pass khz to pmtimer_setup - it's always PM_TIMER_FREQUENCY.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>

5 files changed, 9 insertions, 8 deletions

diff --git a/src/acpi.c b/src/acpi.c
index 3699898..365cc46 100644
--- a/src/acpi.c
+++ b/src/acpi.c
@@ -732,7 +732,7 @@ find_acpi_features(void)
     u32 pm_tmr = le32_to_cpu(fadt->pm_tmr_blk);
     dprintf(4, "pm_tmr_blk=%x\n", pm_tmr);
     if (pm_tmr)
-        pmtimer_setup(pm_tmr, 3579);
+        pmtimer_setup(pm_tmr);
 
     // Theoretically we should check the 'reset_reg_sup' flag, but Windows
     // doesn't and thus nobody seems to *set* it. If the table is large enough
diff --git a/src/pciinit.c b/src/pciinit.c
index 8370b96..6d7f8fa 100644
--- a/src/pciinit.c
+++ b/src/pciinit.c
@@ -16,9 +16,6 @@
 #include "dev-q35.h" // Q35_HOST_BRIDGE_PCIEXBAR_ADDR
 #include "list.h" // struct hlist_node
 
-/* PM Timer ticks per second (HZ) */
-#define PM_TIMER_FREQUENCY  3579545
-
 #define PCI_DEVICE_MEM_MIN     0x1000
 #define PCI_BRIDGE_IO_MIN      0x1000
 #define PCI_BRIDGE_MEM_MIN   0x100000
@@ -194,7 +191,7 @@ void mch_isa_bridge_setup(struct pci_device *dev, void *arg)
     /* acpi enable, SCI: IRQ9 000b = irq9*/
     pci_config_writeb(bdf, ICH9_LPC_ACPI_CTRL, ICH9_LPC_ACPI_CTRL_ACPI_EN);
 
-    pmtimer_setup(PORT_ACPI_PM_BASE + 0x08, PM_TIMER_FREQUENCY / 1000);
+    pmtimer_setup(PORT_ACPI_PM_BASE + 0x08);
 }
 
 static void storage_ide_setup(struct pci_device *pci, void *arg)
@@ -238,7 +235,7 @@ static void piix4_pm_setup(struct pci_device *pci, void *arg)
     pci_config_writel(bdf, 0x90, PORT_SMB_BASE | 1);
     pci_config_writeb(bdf, 0xd2, 0x09); /* enable SMBus io space */
 
-    pmtimer_setup(PORT_ACPI_PM_BASE + 0x08, PM_TIMER_FREQUENCY / 1000);
+    pmtimer_setup(PORT_ACPI_PM_BASE + 0x08);
 }
 
 /* ICH9 SMBUS */
diff --git a/src/pit.h b/src/pit.h
index 6d58895..7b5e5e8 100644
--- a/src/pit.h
+++ b/src/pit.h
@@ -2,6 +2,9 @@
 #ifndef __PIT_H
 #define __PIT_H
 
+/* PM Timer ticks per second (HZ) */
+#define PM_TIMER_FREQUENCY  3579545
+
 #define PIT_TICK_RATE 1193180   // Underlying HZ of PIT
 #define PIT_TICK_INTERVAL 65536 // Default interval for 18.2Hz timer
 #define TICKS_PER_DAY (u32)((u64)60*60*24*PIT_TICK_RATE / PIT_TICK_INTERVAL)
diff --git a/src/timer.c b/src/timer.c
index a491ef6..87df97b 100644
--- a/src/timer.c
+++ b/src/timer.c
@@ -99,10 +99,11 @@ emulate_tsc(void)
     return ret;
 }
 
-void pmtimer_setup(u16 ioport, u32 khz)
+void pmtimer_setup(u16 ioport)
 {
     if (!CONFIG_PMTIMER)
         return;
+    u32 khz = PM_TIMER_FREQUENCY / 1000;
     dprintf(1, "Using pmtimer, ioport 0x%x, freq %d kHz\n", ioport, khz);
     SET_GLOBAL(pmtimer_ioport, ioport);
     SET_GLOBAL(cpu_khz, khz);
diff --git a/src/util.h b/src/util.h
index 19733cd..15982e2 100644
--- a/src/util.h
+++ b/src/util.h
@@ -282,7 +282,7 @@ void useRTC(void);
 void releaseRTC(void);
 
 // timer.c
-void pmtimer_setup(u16 ioport, u32 khz);
+void pmtimer_setup(u16 ioport);
 int check_tsc(u64 end);
 void timer_setup(void);
 void ndelay(u32 count);