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-rw-r--r--drivers/ide/pci/Makefile2
-rw-r--r--drivers/ide/pci/cs5530.c13
-rw-r--r--drivers/ide/pci/cy82c693.c5
-rw-r--r--drivers/ide/pci/generic.c11
-rw-r--r--drivers/ide/pci/it8172.c307
-rw-r--r--drivers/ide/pci/jmicron.c269
-rw-r--r--drivers/ide/pci/pdc202xx_old.c22
-rw-r--r--drivers/ide/pci/piix.c31
-rw-r--r--drivers/ide/pci/sc1200.c4
-rw-r--r--drivers/ide/pci/sgiioc4.c20
-rw-r--r--drivers/ide/pci/siimage.c1
-rw-r--r--drivers/ide/pci/via82cxxx.c5
12 files changed, 333 insertions, 357 deletions
diff --git a/drivers/ide/pci/Makefile b/drivers/ide/pci/Makefile
index f35d684edc250a..fef08960aa4ce2 100644
--- a/drivers/ide/pci/Makefile
+++ b/drivers/ide/pci/Makefile
@@ -12,8 +12,8 @@ obj-$(CONFIG_BLK_DEV_CY82C693) += cy82c693.o
obj-$(CONFIG_BLK_DEV_HPT34X) += hpt34x.o
obj-$(CONFIG_BLK_DEV_HPT366) += hpt366.o
#obj-$(CONFIG_BLK_DEV_HPT37X) += hpt37x.o
-obj-$(CONFIG_BLK_DEV_IT8172) += it8172.o
obj-$(CONFIG_BLK_DEV_IT821X) += it821x.o
+obj-$(CONFIG_BLK_DEV_JMICRON) += jmicron.o
obj-$(CONFIG_BLK_DEV_NS87415) += ns87415.o
obj-$(CONFIG_BLK_DEV_OPTI621) += opti621.o
obj-$(CONFIG_BLK_DEV_PDC202XX_OLD) += pdc202xx_old.o
diff --git a/drivers/ide/pci/cs5530.c b/drivers/ide/pci/cs5530.c
index 380bb28c7c54aa..ae405fa3223669 100644
--- a/drivers/ide/pci/cs5530.c
+++ b/drivers/ide/pci/cs5530.c
@@ -222,23 +222,23 @@ static unsigned int __devinit init_chipset_cs5530 (struct pci_dev *dev, const ch
unsigned long flags;
dev = NULL;
- while ((dev = pci_find_device(PCI_VENDOR_ID_CYRIX, PCI_ANY_ID, dev)) != NULL) {
+ while ((dev = pci_get_device(PCI_VENDOR_ID_CYRIX, PCI_ANY_ID, dev)) != NULL) {
switch (dev->device) {
case PCI_DEVICE_ID_CYRIX_PCI_MASTER:
- master_0 = dev;
+ master_0 = pci_dev_get(dev);
break;
case PCI_DEVICE_ID_CYRIX_5530_LEGACY:
- cs5530_0 = dev;
+ cs5530_0 = pci_dev_get(dev);
break;
}
}
if (!master_0) {
printk(KERN_ERR "%s: unable to locate PCI MASTER function\n", name);
- return 0;
+ goto out;
}
if (!cs5530_0) {
printk(KERN_ERR "%s: unable to locate CS5530 LEGACY function\n", name);
- return 0;
+ goto out;
}
spin_lock_irqsave(&ide_lock, flags);
@@ -296,6 +296,9 @@ static unsigned int __devinit init_chipset_cs5530 (struct pci_dev *dev, const ch
spin_unlock_irqrestore(&ide_lock, flags);
+out:
+ pci_dev_put(master_0);
+ pci_dev_put(cs5530_0);
return 0;
}
diff --git a/drivers/ide/pci/cy82c693.c b/drivers/ide/pci/cy82c693.c
index 120929fbe7a37c..64330c459bd47e 100644
--- a/drivers/ide/pci/cy82c693.c
+++ b/drivers/ide/pci/cy82c693.c
@@ -281,7 +281,7 @@ static void cy82c693_tune_drive (ide_drive_t *drive, u8 pio)
/* select primary or secondary channel */
if (hwif->index > 0) { /* drive is on the secondary channel */
- dev = pci_find_slot(dev->bus->number, dev->devfn+1);
+ dev = pci_get_slot(dev->bus, dev->devfn+1);
if (!dev) {
printk(KERN_ERR "%s: tune_drive: "
"Cannot find secondary interface!\n",
@@ -500,8 +500,9 @@ static int __devinit cy82c693_init_one(struct pci_dev *dev, const struct pci_dev
Function 1 is primary IDE channel, function 2 - secondary. */
if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
PCI_FUNC(dev->devfn) == 1) {
- dev2 = pci_find_slot(dev->bus->number, dev->devfn + 1);
+ dev2 = pci_get_slot(dev->bus, dev->devfn + 1);
ret = ide_setup_pci_devices(dev, dev2, d);
+ /* We leak pci refs here but thats ok - we can't be unloaded */
}
return ret;
}
diff --git a/drivers/ide/pci/generic.c b/drivers/ide/pci/generic.c
index 78810ba982e9ef..0cb7b9b520ea19 100644
--- a/drivers/ide/pci/generic.c
+++ b/drivers/ide/pci/generic.c
@@ -41,15 +41,8 @@
static int ide_generic_all; /* Set to claim all devices */
-#ifndef MODULE
-static int __init ide_generic_all_on(char *unused)
-{
- ide_generic_all = 1;
- printk(KERN_INFO "IDE generic will claim all unknown PCI IDE storage controllers.\n");
- return 1;
-}
-__setup("all-generic-ide", ide_generic_all_on);
-#endif
+module_param_named(all_generic_ide, ide_generic_all, bool, 0444);
+MODULE_PARM_DESC(all_generic_ide, "IDE generic will claim all unknown PCI IDE storage controllers.");
static void __devinit init_hwif_generic (ide_hwif_t *hwif)
{
diff --git a/drivers/ide/pci/it8172.c b/drivers/ide/pci/it8172.c
deleted file mode 100644
index 0fc89fafad656d..00000000000000
--- a/drivers/ide/pci/it8172.c
+++ /dev/null
@@ -1,307 +0,0 @@
-/*
- *
- * BRIEF MODULE DESCRIPTION
- * IT8172 IDE controller support
- *
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * stevel@mvista.com or source@mvista.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/ioport.h>
-#include <linux/pci.h>
-#include <linux/hdreg.h>
-#include <linux/ide.h>
-#include <linux/delay.h>
-#include <linux/init.h>
-
-#include <asm/io.h>
-#include <asm/it8172/it8172_int.h>
-
-/*
- * Prototypes
- */
-static u8 it8172_ratemask (ide_drive_t *drive)
-{
- return 1;
-}
-
-static void it8172_tune_drive (ide_drive_t *drive, u8 pio)
-{
- ide_hwif_t *hwif = HWIF(drive);
- struct pci_dev *dev = hwif->pci_dev;
- int is_slave = (&hwif->drives[1] == drive);
- unsigned long flags;
- u16 drive_enables;
- u32 drive_timing;
-
- pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
- spin_lock_irqsave(&ide_lock, flags);
- pci_read_config_word(dev, 0x40, &drive_enables);
- pci_read_config_dword(dev, 0x44, &drive_timing);
-
- /*
- * FIX! The DIOR/DIOW pulse width and recovery times in port 0x44
- * are being left at the default values of 8 PCI clocks (242 nsec
- * for a 33 MHz clock). These can be safely shortened at higher
- * PIO modes. The DIOR/DIOW pulse width and recovery times only
- * apply to PIO modes, not to the DMA modes.
- */
-
- /*
- * Enable port 0x44. The IT8172G spec is confused; it calls
- * this register the "Slave IDE Timing Register", but in fact,
- * it controls timing for both master and slave drives.
- */
- drive_enables |= 0x4000;
-
- if (is_slave) {
- drive_enables &= 0xc006;
- if (pio > 1)
- /* enable prefetch and IORDY sample-point */
- drive_enables |= 0x0060;
- } else {
- drive_enables &= 0xc060;
- if (pio > 1)
- /* enable prefetch and IORDY sample-point */
- drive_enables |= 0x0006;
- }
-
- pci_write_config_word(dev, 0x40, drive_enables);
- spin_unlock_irqrestore(&ide_lock, flags);
-}
-
-static u8 it8172_dma_2_pio (u8 xfer_rate)
-{
- switch(xfer_rate) {
- case XFER_UDMA_5:
- case XFER_UDMA_4:
- case XFER_UDMA_3:
- case XFER_UDMA_2:
- case XFER_UDMA_1:
- case XFER_UDMA_0:
- case XFER_MW_DMA_2:
- case XFER_PIO_4:
- return 4;
- case XFER_MW_DMA_1:
- case XFER_PIO_3:
- return 3;
- case XFER_SW_DMA_2:
- case XFER_PIO_2:
- return 2;
- case XFER_MW_DMA_0:
- case XFER_SW_DMA_1:
- case XFER_SW_DMA_0:
- case XFER_PIO_1:
- case XFER_PIO_0:
- case XFER_PIO_SLOW:
- default:
- return 0;
- }
-}
-
-static int it8172_tune_chipset (ide_drive_t *drive, u8 xferspeed)
-{
- ide_hwif_t *hwif = HWIF(drive);
- struct pci_dev *dev = hwif->pci_dev;
- u8 speed = ide_rate_filter(it8172_ratemask(drive), xferspeed);
- int a_speed = 3 << (drive->dn * 4);
- int u_flag = 1 << drive->dn;
- int u_speed = 0;
- u8 reg48, reg4a;
-
- pci_read_config_byte(dev, 0x48, &reg48);
- pci_read_config_byte(dev, 0x4a, &reg4a);
-
- /*
- * Setting the DMA cycle time to 2 or 3 PCI clocks (60 and 91 nsec
- * at 33 MHz PCI clock) seems to cause BadCRC errors during DMA
- * transfers on some drives, even though both numbers meet the minimum
- * ATAPI-4 spec of 73 and 54 nsec for UDMA 1 and 2 respectively.
- * So the faster times are just commented out here. The good news is
- * that the slower cycle time has very little affect on transfer
- * performance.
- */
-
- switch(speed) {
- case XFER_UDMA_4:
- case XFER_UDMA_2: //u_speed = 2 << (drive->dn * 4); break;
- case XFER_UDMA_5:
- case XFER_UDMA_3:
- case XFER_UDMA_1: //u_speed = 1 << (drive->dn * 4); break;
- case XFER_UDMA_0: u_speed = 0 << (drive->dn * 4); break;
- case XFER_MW_DMA_2:
- case XFER_MW_DMA_1:
- case XFER_MW_DMA_0:
- case XFER_SW_DMA_2: break;
- case XFER_PIO_4:
- case XFER_PIO_3:
- case XFER_PIO_2:
- case XFER_PIO_0: break;
- default: return -1;
- }
-
- if (speed >= XFER_UDMA_0) {
- pci_write_config_byte(dev, 0x48, reg48 | u_flag);
- reg4a &= ~a_speed;
- pci_write_config_byte(dev, 0x4a, reg4a | u_speed);
- } else {
- pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
- pci_write_config_byte(dev, 0x4a, reg4a & ~a_speed);
- }
-
- it8172_tune_drive(drive, it8172_dma_2_pio(speed));
- return (ide_config_drive_speed(drive, speed));
-}
-
-static int it8172_config_chipset_for_dma (ide_drive_t *drive)
-{
- u8 speed = ide_dma_speed(drive, it8172_ratemask(drive));
-
- if (!(speed)) {
- u8 tspeed = ide_get_best_pio_mode(drive, 255, 4, NULL);
- speed = it8172_dma_2_pio(XFER_PIO_0 + tspeed);
- }
-
- (void) it8172_tune_chipset(drive, speed);
- return ide_dma_enable(drive);
-}
-
-static int it8172_config_drive_xfer_rate (ide_drive_t *drive)
-{
- ide_hwif_t *hwif = HWIF(drive);
- struct hd_driveid *id = drive->id;
-
- drive->init_speed = 0;
-
- if (id && (id->capability & 1) && drive->autodma) {
-
- if (ide_use_dma(drive)) {
- if (it8172_config_chipset_for_dma(drive))
- return hwif->ide_dma_on(drive);
- }
-
- goto fast_ata_pio;
-
- } else if ((id->capability & 8) || (id->field_valid & 2)) {
-fast_ata_pio:
- it8172_tune_drive(drive, 5);
- return hwif->ide_dma_off_quietly(drive);
- }
- /* IORDY not supported */
- return 0;
-}
-
-static unsigned int __devinit init_chipset_it8172 (struct pci_dev *dev, const char *name)
-{
- unsigned char progif;
-
- /*
- * Place both IDE interfaces into PCI "native" mode
- */
- pci_read_config_byte(dev, PCI_CLASS_PROG, &progif);
- pci_write_config_byte(dev, PCI_CLASS_PROG, progif | 0x05);
-
- return IT8172_IDE_IRQ;
-}
-
-
-static void __devinit init_hwif_it8172 (ide_hwif_t *hwif)
-{
- struct pci_dev* dev = hwif->pci_dev;
- unsigned long cmdBase, ctrlBase;
-
- hwif->autodma = 0;
- hwif->tuneproc = &it8172_tune_drive;
- hwif->speedproc = &it8172_tune_chipset;
-
- cmdBase = dev->resource[0].start;
- ctrlBase = dev->resource[1].start;
-
- ide_init_hwif_ports(&hwif->hw, cmdBase, ctrlBase | 2, NULL);
- memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->io_ports));
- hwif->noprobe = 0;
-
- if (!hwif->dma_base) {
- hwif->drives[0].autotune = 1;
- hwif->drives[1].autotune = 1;
- return;
- }
-
- hwif->atapi_dma = 1;
- hwif->ultra_mask = 0x07;
- hwif->mwdma_mask = 0x06;
- hwif->swdma_mask = 0x04;
-
- hwif->ide_dma_check = &it8172_config_drive_xfer_rate;
- if (!noautodma)
- hwif->autodma = 1;
- hwif->drives[0].autodma = hwif->autodma;
- hwif->drives[1].autodma = hwif->autodma;
-}
-
-static ide_pci_device_t it8172_chipsets[] __devinitdata = {
- { /* 0 */
- .name = "IT8172G",
- .init_chipset = init_chipset_it8172,
- .init_hwif = init_hwif_it8172,
- .channels = 2,
- .autodma = AUTODMA,
- .enablebits = {{0x00,0x00,0x00}, {0x40,0x00,0x01}},
- .bootable = ON_BOARD,
- }
-};
-
-static int __devinit it8172_init_one(struct pci_dev *dev, const struct pci_device_id *id)
-{
- if ((!(PCI_FUNC(dev->devfn) & 1) ||
- (!((dev->class >> 8) == PCI_CLASS_STORAGE_IDE))))
- return -ENODEV; /* IT8172 is more than an IDE controller */
- return ide_setup_pci_device(dev, &it8172_chipsets[id->driver_data]);
-}
-
-static struct pci_device_id it8172_pci_tbl[] = {
- { PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_IT8172G, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
- { 0, },
-};
-MODULE_DEVICE_TABLE(pci, it8172_pci_tbl);
-
-static struct pci_driver driver = {
- .name = "IT8172_IDE",
- .id_table = it8172_pci_tbl,
- .probe = it8172_init_one,
-};
-
-static int it8172_ide_init(void)
-{
- return ide_pci_register_driver(&driver);
-}
-
-module_init(it8172_ide_init);
-
-MODULE_AUTHOR("SteveL@mvista.com");
-MODULE_DESCRIPTION("PCI driver module for ITE 8172 IDE");
-MODULE_LICENSE("GPL");
diff --git a/drivers/ide/pci/jmicron.c b/drivers/ide/pci/jmicron.c
new file mode 100644
index 00000000000000..68c74bbf8b06a3
--- /dev/null
+++ b/drivers/ide/pci/jmicron.c
@@ -0,0 +1,269 @@
+
+/*
+ * Copyright (C) 2006 Red Hat <alan@redhat.com>
+ *
+ * May be copied or modified under the terms of the GNU General Public License
+ */
+
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/delay.h>
+#include <linux/hdreg.h>
+#include <linux/ide.h>
+#include <linux/init.h>
+
+#include <asm/io.h>
+
+typedef enum {
+ PORT_PATA0 = 0,
+ PORT_PATA1 = 1,
+ PORT_SATA = 2,
+} port_type;
+
+/**
+ * jmicron_ratemask - Compute available modes
+ * @drive: IDE drive
+ *
+ * Compute the available speeds for the devices on the interface. This
+ * is all modes to ATA133 clipped by drive cable setup.
+ */
+
+static u8 jmicron_ratemask(ide_drive_t *drive)
+{
+ u8 mode = 4;
+ if (!eighty_ninty_three(drive))
+ mode = min(mode, (u8)1);
+ return mode;
+}
+
+/**
+ * ata66_jmicron - Cable check
+ * @hwif: IDE port
+ *
+ * Return 1 if the cable is 80pin
+ */
+
+static int __devinit ata66_jmicron(ide_hwif_t *hwif)
+{
+ struct pci_dev *pdev = hwif->pci_dev;
+
+ u32 control;
+ u32 control5;
+
+ int port = hwif->channel;
+ port_type port_map[2];
+
+ pci_read_config_dword(pdev, 0x40, &control);
+
+ /* There are two basic mappings. One has the two SATA ports merged
+ as master/slave and the secondary as PATA, the other has only the
+ SATA port mapped */
+ if (control & (1 << 23)) {
+ port_map[0] = PORT_SATA;
+ port_map[1] = PORT_PATA0;
+ } else {
+ port_map[0] = PORT_SATA;
+ port_map[1] = PORT_SATA;
+ }
+
+ /* The 365/366 may have this bit set to map the second PATA port
+ as the internal primary channel */
+ pci_read_config_dword(pdev, 0x80, &control5);
+ if (control5 & (1<<24))
+ port_map[0] = PORT_PATA1;
+
+ /* The two ports may then be logically swapped by the firmware */
+ if (control & (1 << 22))
+ port = port ^ 1;
+
+ /*
+ * Now we know which physical port we are talking about we can
+ * actually do our cable checking etc. Thankfully we don't need
+ * to do the plumbing for other cases.
+ */
+ switch (port_map[port])
+ {
+ case PORT_PATA0:
+ if (control & (1 << 3)) /* 40/80 pin primary */
+ return 1;
+ return 0;
+ case PORT_PATA1:
+ if (control5 & (1 << 19)) /* 40/80 pin secondary */
+ return 0;
+ return 1;
+ case PORT_SATA:
+ return 1;
+ }
+}
+
+static void jmicron_tuneproc (ide_drive_t *drive, byte mode_wanted)
+{
+ return;
+}
+
+/**
+ * config_jmicron_chipset_for_pio - set drive timings
+ * @drive: drive to tune
+ * @speed we want
+ *
+ */
+
+static void config_jmicron_chipset_for_pio (ide_drive_t *drive, byte set_speed)
+{
+ u8 speed = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, 5, NULL);
+ if (set_speed)
+ (void) ide_config_drive_speed(drive, speed);
+}
+
+/**
+ * jmicron_tune_chipset - set controller timings
+ * @drive: Drive to set up
+ * @xferspeed: speed we want to achieve
+ *
+ * As the JMicron snoops for timings all we actually need to do is
+ * make sure we don't set an invalid mode. We do need to honour
+ * the cable detect here.
+ */
+
+static int jmicron_tune_chipset (ide_drive_t *drive, byte xferspeed)
+{
+
+ u8 speed = ide_rate_filter(jmicron_ratemask(drive), xferspeed);
+
+ return ide_config_drive_speed(drive, speed);
+}
+
+/**
+ * config_chipset_for_dma - configure for DMA
+ * @drive: drive to configure
+ *
+ * As the JMicron snoops for timings all we actually need to do is
+ * make sure we don't set an invalid mode.
+ */
+
+static int config_chipset_for_dma (ide_drive_t *drive)
+{
+ u8 speed = ide_dma_speed(drive, jmicron_ratemask(drive));
+
+ config_jmicron_chipset_for_pio(drive, !speed);
+ jmicron_tune_chipset(drive, speed);
+ return ide_dma_enable(drive);
+}
+
+/**
+ * jmicron_configure_drive_for_dma - set up for DMA transfers
+ * @drive: drive we are going to set up
+ *
+ * As the JMicron snoops for timings all we actually need to do is
+ * make sure we don't set an invalid mode.
+ */
+
+static int jmicron_config_drive_for_dma (ide_drive_t *drive)
+{
+ ide_hwif_t *hwif = drive->hwif;
+
+ if (ide_use_dma(drive)) {
+ if (config_chipset_for_dma(drive))
+ return hwif->ide_dma_on(drive);
+ }
+ config_jmicron_chipset_for_pio(drive, 1);
+ return hwif->ide_dma_off_quietly(drive);
+}
+
+/**
+ * init_hwif_jmicron - set up hwif structs
+ * @hwif: interface to set up
+ *
+ * Minimal set up is required for the Jmicron hardware.
+ */
+
+static void __devinit init_hwif_jmicron(ide_hwif_t *hwif)
+{
+ hwif->speedproc = &jmicron_tune_chipset;
+ hwif->tuneproc = &jmicron_tuneproc;
+
+ hwif->drives[0].autotune = 1;
+ hwif->drives[1].autotune = 1;
+
+ if (!hwif->dma_base)
+ goto fallback;
+
+ hwif->atapi_dma = 1;
+ hwif->ultra_mask = 0x7f;
+ hwif->mwdma_mask = 0x07;
+
+ hwif->ide_dma_check = &jmicron_config_drive_for_dma;
+ if (!(hwif->udma_four))
+ hwif->udma_four = ata66_jmicron(hwif);
+
+ hwif->autodma = 1;
+ hwif->drives[0].autodma = hwif->autodma;
+ hwif->drives[1].autodma = hwif->autodma;
+ return;
+fallback:
+ hwif->autodma = 0;
+ return;
+}
+
+#define DECLARE_JMB_DEV(name_str) \
+ { \
+ .name = name_str, \
+ .init_hwif = init_hwif_jmicron, \
+ .channels = 2, \
+ .autodma = AUTODMA, \
+ .bootable = ON_BOARD, \
+ .enablebits = { {0x40, 1, 1}, {0x40, 0x10, 0x10} }, \
+ }
+
+static ide_pci_device_t jmicron_chipsets[] __devinitdata = {
+ /* 0 */ DECLARE_JMB_DEV("JMB361"),
+ /* 1 */ DECLARE_JMB_DEV("JMB363"),
+ /* 2 */ DECLARE_JMB_DEV("JMB365"),
+ /* 3 */ DECLARE_JMB_DEV("JMB366"),
+ /* 4 */ DECLARE_JMB_DEV("JMB368"),
+};
+
+/**
+ * jmicron_init_one - pci layer discovery entry
+ * @dev: PCI device
+ * @id: ident table entry
+ *
+ * Called by the PCI code when it finds a Jmicron controller.
+ * We then use the IDE PCI generic helper to do most of the work.
+ */
+
+static int __devinit jmicron_init_one(struct pci_dev *dev, const struct pci_device_id *id)
+{
+ ide_setup_pci_device(dev, &jmicron_chipsets[id->driver_data]);
+ return 0;
+}
+
+static struct pci_device_id jmicron_pci_tbl[] = {
+ { PCI_DEVICE(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361), 0},
+ { PCI_DEVICE(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB363), 1},
+ { PCI_DEVICE(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB365), 2},
+ { PCI_DEVICE(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366), 3},
+ { PCI_DEVICE(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB368), 4},
+ { 0, },
+};
+
+MODULE_DEVICE_TABLE(pci, jmicron_pci_tbl);
+
+static struct pci_driver driver = {
+ .name = "JMicron IDE",
+ .id_table = jmicron_pci_tbl,
+ .probe = jmicron_init_one,
+};
+
+static int __init jmicron_ide_init(void)
+{
+ return ide_pci_register_driver(&driver);
+}
+
+module_init(jmicron_ide_init);
+
+MODULE_AUTHOR("Alan Cox");
+MODULE_DESCRIPTION("PCI driver module for the JMicron in legacy modes");
+MODULE_LICENSE("GPL");
diff --git a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c
index b46022a11bef82..184cdacddeb6b7 100644
--- a/drivers/ide/pci/pdc202xx_old.c
+++ b/drivers/ide/pci/pdc202xx_old.c
@@ -154,7 +154,8 @@ static int pdc202xx_tune_chipset (ide_drive_t *drive, u8 xferspeed)
u8 AP, BP, CP, DP;
u8 TA = 0, TB = 0, TC = 0;
- if ((drive->media != ide_disk) && (speed < XFER_SW_DMA_0))
+ if (drive->media != ide_disk &&
+ drive->media != ide_cdrom && speed < XFER_SW_DMA_0)
return -1;
pci_read_config_dword(dev, drive_pci, &drive_conf);
@@ -330,14 +331,12 @@ static int config_chipset_for_dma (ide_drive_t *drive)
chipset_is_set:
- if (drive->media == ide_disk) {
- pci_read_config_byte(dev, (drive_pci), &AP);
- if (id->capability & 4) /* IORDY_EN */
- pci_write_config_byte(dev, (drive_pci), AP|IORDY_EN);
- pci_read_config_byte(dev, (drive_pci), &AP);
- if (drive->media == ide_disk) /* PREFETCH_EN */
- pci_write_config_byte(dev, (drive_pci), AP|PREFETCH_EN);
- }
+ pci_read_config_byte(dev, (drive_pci), &AP);
+ if (id->capability & 4) /* IORDY_EN */
+ pci_write_config_byte(dev, (drive_pci), AP|IORDY_EN);
+ pci_read_config_byte(dev, (drive_pci), &AP);
+ if (drive->media == ide_disk) /* PREFETCH_EN */
+ pci_write_config_byte(dev, (drive_pci), AP|PREFETCH_EN);
speed = ide_dma_speed(drive, pdc202xx_ratemask(drive));
@@ -385,7 +384,7 @@ static void pdc202xx_old_ide_dma_start(ide_drive_t *drive)
{
if (drive->current_speed > XFER_UDMA_2)
pdc_old_enable_66MHz_clock(drive->hwif);
- if (drive->addressing == 1) {
+ if (drive->media != ide_disk || drive->addressing == 1) {
struct request *rq = HWGROUP(drive)->rq;
ide_hwif_t *hwif = HWIF(drive);
unsigned long high_16 = hwif->dma_master;
@@ -405,7 +404,7 @@ static void pdc202xx_old_ide_dma_start(ide_drive_t *drive)
static int pdc202xx_old_ide_dma_end(ide_drive_t *drive)
{
- if (drive->addressing == 1) {
+ if (drive->media != ide_disk || drive->addressing == 1) {
ide_hwif_t *hwif = HWIF(drive);
unsigned long high_16 = hwif->dma_master;
unsigned long atapi_reg = high_16 + (hwif->channel ? 0x24 : 0x20);
@@ -519,6 +518,7 @@ static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif)
hwif->ultra_mask = 0x3f;
hwif->mwdma_mask = 0x07;
hwif->swdma_mask = 0x07;
+ hwif->atapi_dma = 1;
hwif->err_stops_fifo = 1;
diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c
index eb5bab1890cd1d..cdc3aab9ebcbc4 100644
--- a/drivers/ide/pci/piix.c
+++ b/drivers/ide/pci/piix.c
@@ -222,13 +222,15 @@ static void piix_tune_drive (ide_drive_t *drive, u8 pio)
u16 master_data;
u8 slave_data;
static DEFINE_SPINLOCK(tune_lock);
+ int control = 0;
/* ISP RTC */
- u8 timings[][2] = { { 0, 0 },
- { 0, 0 },
- { 1, 0 },
- { 2, 1 },
- { 2, 3 }, };
+ static const u8 timings[][2]= {
+ { 0, 0 },
+ { 0, 0 },
+ { 1, 0 },
+ { 2, 1 },
+ { 2, 3 }, };
pio = ide_get_best_pio_mode(drive, pio, 5, NULL);
@@ -239,19 +241,30 @@ static void piix_tune_drive (ide_drive_t *drive, u8 pio)
*/
spin_lock_irqsave(&tune_lock, flags);
pci_read_config_word(dev, master_port, &master_data);
+
+ if (pio >= 2)
+ control |= 1; /* Programmable timing on */
+ if (drive->media == ide_disk)
+ control |= 4; /* Prefetch, post write */
+ if (pio >= 3)
+ control |= 2; /* IORDY */
if (is_slave) {
master_data = master_data | 0x4000;
- if (pio > 1)
+ if (pio > 1) {
/* enable PPE, IE and TIME */
- master_data = master_data | 0x0070;
+ master_data = master_data | (control << 4);
+ } else {
+ master_data &= ~0x0070;
+ }
pci_read_config_byte(dev, slave_port, &slave_data);
slave_data = slave_data & (hwif->channel ? 0x0f : 0xf0);
slave_data = slave_data | (((timings[pio][0] << 2) | timings[pio][1]) << (hwif->channel ? 4 : 0));
} else {
master_data = master_data & 0xccf8;
- if (pio > 1)
+ if (pio > 1) {
/* enable PPE, IE and TIME */
- master_data = master_data | 0x0007;
+ master_data = master_data | control;
+ }
master_data = master_data | (timings[pio][0] << 12) | (timings[pio][1] << 8);
}
pci_write_config_word(dev, master_port, master_data);
diff --git a/drivers/ide/pci/sc1200.c b/drivers/ide/pci/sc1200.c
index fc2b5496b6d251..ff80937d94ddd3 100644
--- a/drivers/ide/pci/sc1200.c
+++ b/drivers/ide/pci/sc1200.c
@@ -323,6 +323,7 @@ static void sc1200_tuneproc (ide_drive_t *drive, byte pio) /* mode=255 means "au
}
}
+#ifdef CONFIG_PM
static ide_hwif_t *lookup_pci_dev (ide_hwif_t *prev, struct pci_dev *dev)
{
int h;
@@ -451,6 +452,7 @@ static int sc1200_resume (struct pci_dev *dev)
}
return 0;
}
+#endif
/*
* This gets invoked by the IDE driver once for each channel,
@@ -499,8 +501,10 @@ static struct pci_driver driver = {
.name = "SC1200_IDE",
.id_table = sc1200_pci_tbl,
.probe = sc1200_init_one,
+#ifdef CONFIG_PM
.suspend = sc1200_suspend,
.resume = sc1200_resume,
+#endif
};
static int sc1200_ide_init(void)
diff --git a/drivers/ide/pci/sgiioc4.c b/drivers/ide/pci/sgiioc4.c
index d8a0d87df734bb..f3fe287fbd89ba 100644
--- a/drivers/ide/pci/sgiioc4.c
+++ b/drivers/ide/pci/sgiioc4.c
@@ -220,7 +220,7 @@ sgiioc4_ide_dma_end(ide_drive_t * drive)
ide_hwif_t *hwif = HWIF(drive);
u64 dma_base = hwif->dma_base;
int dma_stat = 0;
- unsigned long *ending_dma = (unsigned long *) hwif->dma_base2;
+ unsigned long *ending_dma = ide_get_hwifdata(hwif);
hwif->OUTL(IOC4_S_DMA_STOP, dma_base + IOC4_DMA_CTRL * 4);
@@ -369,6 +369,7 @@ ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base)
{
void __iomem *virt_dma_base;
int num_ports = sizeof (ioc4_dma_regs_t);
+ void *pad;
printk(KERN_INFO "%s: BM-DMA at 0x%04lx-0x%04lx\n", hwif->name,
dma_base, dma_base + num_ports - 1);
@@ -400,17 +401,14 @@ ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base)
hwif->sg_max_nents = IOC4_PRD_ENTRIES;
- hwif->dma_base2 = (unsigned long)
- pci_alloc_consistent(hwif->pci_dev,
- IOC4_IDE_CACHELINE_SIZE,
- (dma_addr_t *) &(hwif->dma_status));
+ pad = pci_alloc_consistent(hwif->pci_dev, IOC4_IDE_CACHELINE_SIZE,
+ (dma_addr_t *) &(hwif->dma_status));
- if (!hwif->dma_base2)
- goto dma_base2alloc_failure;
-
- return;
+ if (pad) {
+ ide_set_hwifdata(hwif, pad);
+ return;
+ }
-dma_base2alloc_failure:
pci_free_consistent(hwif->pci_dev,
IOC4_PRD_ENTRIES * IOC4_PRD_BYTES,
hwif->dmatable_cpu, hwif->dmatable_dma);
@@ -476,7 +474,7 @@ sgiioc4_configure_for_dma(int dma_direction, ide_drive_t * drive)
hwif->OUTL(dma_addr, dma_base + IOC4_DMA_PTR_L * 4);
/* Address of the Ending DMA */
- memset((unsigned int *) hwif->dma_base2, 0, IOC4_IDE_CACHELINE_SIZE);
+ memset(ide_get_hwifdata(hwif), 0, IOC4_IDE_CACHELINE_SIZE);
ending_dma_addr = cpu_to_le32(hwif->dma_status);
hwif->OUTL(ending_dma_addr, dma_base + IOC4_DMA_END_ADDR * 4);
diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c
index 20b392948f366a..697f566fb90ae0 100644
--- a/drivers/ide/pci/siimage.c
+++ b/drivers/ide/pci/siimage.c
@@ -898,7 +898,6 @@ static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif)
base = (unsigned long) addr;
hwif->dma_base = base + (ch ? 0x08 : 0x00);
- hwif->dma_base2 = base + (ch ? 0x18 : 0x10);
hwif->mmio = 2;
}
diff --git a/drivers/ide/pci/via82cxxx.c b/drivers/ide/pci/via82cxxx.c
index 9b7589e8e93e52..2af634d7acf4a8 100644
--- a/drivers/ide/pci/via82cxxx.c
+++ b/drivers/ide/pci/via82cxxx.c
@@ -248,7 +248,7 @@ static struct via_isa_bridge *via_config_find(struct pci_dev **isa)
u8 t;
for (via_config = via_isa_bridges; via_config->id; via_config++)
- if ((*isa = pci_find_device(PCI_VENDOR_ID_VIA +
+ if ((*isa = pci_get_device(PCI_VENDOR_ID_VIA +
!!(via_config->flags & VIA_BAD_ID),
via_config->id, NULL))) {
@@ -256,6 +256,7 @@ static struct via_isa_bridge *via_config_find(struct pci_dev **isa)
if (t >= via_config->rev_min &&
t <= via_config->rev_max)
break;
+ pci_dev_put(*isa);
}
return via_config;
@@ -283,6 +284,7 @@ static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev, const
via_config = via_config_find(&isa);
if (!via_config->id) {
printk(KERN_WARNING "VP_IDE: Unknown VIA SouthBridge, disabling DMA.\n");
+ pci_dev_put(isa);
return -ENODEV;
}
@@ -361,6 +363,7 @@ static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev, const
via_dma[via_config->flags & VIA_UDMA],
pci_name(dev));
+ pci_dev_put(isa);
return 0;
}
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-05-23 13:30:28 +0000